In NAND memories capable of storing 3 bits/cell, in order to avoid interference between cells, a method of simultaneously writing all bits similarly on adjacent cells after simultaneously writing all of the stored bits on first memory cells, and subsequently rewriting all of the bits on the first memory cells again, is generally used. However, when this method is used, it is necessary to retain data on a controller side to execute the rewriting.
As a method of simultaneously programming all bits, 1-3-3 coding is known. This method is coding in which 7 among 8 regions with threshold voltages of 3 bits/cell are divided into 1, 3, and 3 with 3 bits.
However, since recent NAND memories are 3-dimensional memories, the number of required write buffers on the controller side increases, and so the cost of the controller increases. For this reason, in 3-dimensional nonvolatile memories, it is desirable to take countermeasures for reducing the number of required write buffers in the memory controller while suppressing interference between cells and a deviation of bit error ratios between pages.